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ML6415 S-Video Filter with Summed Composite Output, Sound Trap, and Group Delay Compensation
GENERAL DESCRIPTION
The ML6415 is a dual Y/C 4th-order Butterworth lowpass video filter optimized for minimum overshoot and flat group delay. The device also contains a summing circuit to generate filtered composite video, an audio trap and group delay compensation circuit to notch-out audio, providing an area for the addition of the FM audio carrier(s) and mimic the group delay distortion introduced at the transmitter. The group delay predistortion compensates for the nominal TV receiver IF filter distortion. In a typical application, the Y and C input signals from DACs are AC coupled into the filter. Both channels have DC restore circuitry to clamp the DC input levels during video sync. The Y and C channels use a separate feedback clamp. The clamp pulse is derived from the Y channel. The outputs are AC coupled. The Y, C, CV, and modulator outputs can drive 2Vp-p into a 150 load (1Vp-p 75 coax load). The Y, C, CV, and notch channels have a gain of approximately 2 (6dB) with 1Vp-p input levels.
FEATURES
n 7.1MHz Y and C filters, with CV out n 14dB notch at 4.5MHz for sound trap n 42dB stopband attenuation at 27MHz on Y, C, and CV n Better than 1dB flatness to 4.5 MHz on Y, C, and CV n RF Modulator output differential group delay between 3.0MHz and 3.58MHz is typically -170ns. n No external frequency select components or clocks n 9ns group delay flatness on Y, C, and CV output n 5% overshoot on Y, C, and CV output edges n AC coupled inputs and outputs n 0.4% differential gain on Y, C and CV channels, 0.4 differential phase on Y, C and CV channels n 0.8% total harmonic distortion on all channels n DC restore with low tilt
APPLICATIONS
n Cable Set-top Boxes n Satellite Set-top Boxes n DVD Players
DATASHEET
June, 2000
ML6415
TABLE OF CONTENTS
General Description..........................................................................................................................................1 Features ............................................................................................................................................................1 Applications ......................................................................................................................................................1 Warranty Information.......................................................................................................................................2 Simplified Block Diagram .................................................................................................................................3 Pin Configuration..............................................................................................................................................4 Pin Descriptions................................................................................................................................................4 Functional Description......................................................................................................................................5 Typical Applications Diagram ...........................................................................................................................6 Electrical Characteristics...................................................................................................................................7 Electrical Tables ................................................................................................................................................7 Physical Dimensions .........................................................................................................................................9 Order Information ............................................................................................................................................9
WARRANTY
(c) Micro Linear 2000. property of their respective owners. is a registered trademark of Micro Linear Corporation. All other trademarks are the
Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending. Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this document. The circuits contained in this document are offered as possible applications only. Particular uses or applications may invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its own engineering review before deciding on a particular application. Micro Linear assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Micro Linear products are not designed for use in medical, life saving, or life sustaining applications.
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Datasheet
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ML6415
SIMPLIFIED BLOCK DIAGRAM
VCC 7 SYNC STRIP, REFERENCE, AND TIMING 4TH - ORDER FILTER
YIN
1
x2
YOUT
gM 1V
+
+ gM 1V
x2
6
CVOUT
NOTCH, GROUP DELAY x2
2
RF MOD
CIN
4
4TH - ORDER FILTER
5
COUT
3 GND
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Datasheet
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ML6415
PIN CONFIGURATION
ML6415 -Pin SOIC S0
YIN RF MOD GND CIN 1 2 3 4 7 6 5 YOUT VCC CVOUT COUT
TOP VIEW
PIN DESCRIPTIONS
PIN # Signal Name Description
1 2 3 4 5 6 7 8
YIN RF MOD GND CIN COUT CVOUT VCC YOUT
Luminance input Output to RF modulator driver Ground Chrominance input Chrominance output Composite video output 5V supply Luminance output
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Datasheet
June, 2000
ML6415
FUNCTIONAL DESCRIPTION INTRODUCTION
This product is a dual monolithic continuous time video filter designed for reconstructing the luminance and chrominance signals from an S-Video D/A source. Composite video output is generated by summing the Y and C outputs. The chip is intended for use in applications with AC coupled input and AC coupled outputs. (See Figure 1) The reconstruction filters approximate a 4th-order Butterworth characteristic with an optimization toward low overshoot and flat group delay. Y, C, and CV outputs are capable of driving 2VP-P into AC coupled 150 video loads, with up to 35pF of load capacitance at the output pin. All channels are clamped during sync to establish the appropriate output voltage swing range. Thus the input coupling capacitors do not behave according to the conventional RC time constant. Clamping for all channels settles to less than 10mv within 5ms of a change in video input sources. In most applications the input coupling capacitors are 0.1F. The Y and C input typically sinks 1A during active video, which nominally tilts a horizontal line by about 2mV at the Y output. During sync, the clamp typically sources 20A to restore the DC level. The net result is that the average input current is zero. Any change in the input coupling capacitor's value will inversely alter the amount of tilt per line. Such a change will also linearly affect the clamp response times. This product is robust and stable under all stated load and input conditions. Capacitive bypassing VCC directly to ground ensures this performance. LUMINANCE (Y) I/O The luma input is driven by either a low impedance source of 1Vp-p or the output of a 75 terminated line. The input is required to be AC coupled via a 0.1F coupling capacitor which allows for a settling time of 5ms. The luma output is capable of driving an AC coupled 150 load at 2VP-P, or 1VP-P into a 75 load. Up to 35pF of load capacitance (at the output pin) can be driven without stability or slew issues. The output is AC coupled with a 400F or larger AC coupling capacitor. CHROMINANCE (C) I/O The chroma input is driven by a low impedance source of 0.7Vp-p or the output of a 75 terminated line. The input is required to be AC coupled via a 0.1F coupling capacitor which allows for a clamp setting time of 5ms. The chroma output is capable of driving an AC coupled 150 load at 2VP-P, or 1VP-P into a 75 load. Up to 35pF of load capacitance can be driven without stability or slew issues. A 0.1F AC coupling capacitor is recommended at the output. (This reduces the circuit cost as chroma does not contain low frequency components.) COMPOSITE VIDEO (CV) OUTPUT The composite video output is capable of driving 2 loads to 2VP-P. It is intended to drive a TV and a VCR. Either the TV input or the VCR input can be shorted to ground and the other output will still meet specifications. Up to 35pF of load capacitance (at the output pin) can be driven without stability or slew issues. RF MODULATOR OUTPUT The RF modulator output is capable of driving a 600 load to 2VP-P, but is primarily intended to drive a modulator load.
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Datasheet
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ML6415
TYPICAL APPLICATIONS DIAGRAM
4.5MHz fM SOUND + NOTCH AND GROUP DELAY PROTECTION 0.1 F YIN 1 4th-ORDER FILTER + ENCODER 2
400 F
VIDEO MODULATOR VIDEO CABLES
TO CHANNEL 3 OR 4
75
YOUT 75 6 400 F 75 CVOUT TO TV 75
+ 4 4th-ORDER FILTER
0.1 F CIN
400 F 5
75 CVOUT TO VCR 75
0.1 F 7 5.0V 0.1 F 1F 3
75 COUT 75
Figure 1. Coupled S-Video, Composite Video Line Driver, Sound Trap, and Group Delay Pre-distortion
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Datasheet
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ML6415
ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. DC Supply Voltage ....................................... -0.3V to 7V Analog & Digital I/O..............GND - 0.3V to VCC + 0.3V Output Current (Continuous) CV Channel .........................................................60mA C and Y Channels ................................................30mA Junction Temperature ............................................. 150C Storage Temperature Range ......................-65C to 150C Lead Temperature (Soldering, 10s).......................... 260C Thermal Resistance (JA) ....................................115C/W
OPERATING CONDITIONS
Temperature Range ....................................... 0C to 70C VCC Range................................................... 4.5V to 5.5V
ELECTRICAL TABLES
Unless otherwise specified, VCC = 5.0V 10%, All inputs AC coupled with 100nF, TA = Operating Temperature Range SYMBOL PARAMETER CONDITIONS MIN TYP MAX ICC VCC AV AV Supply Current Supply Range Low Frequency Gain (Y, C) Low Frequency Gain (modulator) Low Frequency Gain (CV) C DC Output Level (During Sync) Y Sync Output Level Y+C Sync Output Level Notch Output Level tCLAMP f1dB fC 0.8fC fSB Vi OS ISC CL dG dP THD XTALK Clamp Response Time (Y Channel) -1.0dB Bandwidth (Flatness) (Y, C, and CV) -3dB Bandwidth (Flatness) (Y, C, and CV) 0.8 x fC Attenuation (Y, C) Stopband Rejection (Y, C, and CV) Input Signal Dynamic Range (All Channels) Peak Overshoot (Y, C, and CV) Output Short Circuit Current (All Channels) Output Shunt Capacitance Drive (All Channels) Differential Gain Differential Phase Output Distortion (All Channels) Crosstalk fIN = 27MHz to 100MHz worst case AC Coupled 2VP-P Output Pulse (loaded) VOUT C, Y, CV, or notch to GND (Note 1) All Outputs Y, C, and CV Outputs Y, C, and CV Outputs VOUT = 1.8VP-P, Y/C Out at 3.58MHz From C Input of 0.5VP-P at 3.58MHz to Y Output From Y Input of 0.4VP-P at 3.58MHz, to C Output PSRR PSRR (All Channels) 0.5VP-P (100kHz) at VCC -37 VIN = 100mVP-P at 400KHz VIN = 100mVP-P at 400KHz VIN = 100mVP-P at 400KHz Sync Present on Y Sync Present on Y Sync Present on Y Sync Present on Y Settled to Within 10mV 4.0 No Load 4.5 5.75 6.1 5.4 1.6 0.75 0.75 0.65 60 5.0 6.0 6.7 5.75 2.0 1.0 1.0 1.0 5 4.5 7.1 1.5 -42 1.4 4.3 40 35 0.4 0.4 0.8 -55 -58 -40 80 75 5.5 6.25 7.3 6.25 2.4 1.25 1.25 1.35 UNITS mA V dB dB dB V V V V ms MHz MHz dB dB VP-P % mA pF % % dB dB dB
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ML6415
ELECTRICAL TABLES (CONTINUED)
SYMBOL tpd SNR Y, C Channel CV Channel Mod Channel tpd tSKEW Tpd dG dP pK MCF AV PSRRmt TCm Group Delay Deviation from Flatness (Y, C, and CV) Skew Between Y & C Outputs Group Delay RF Modulator Output Differential Gain Differential Phase Gain Peaking (Note 2) Modulator Channel Flatness (Note 2) Notch Attenuation (Note 2) Supply Sensitivity Modulator Channel Flatness Modulator Channel Flatness Temperature Sensitivity PARAMETER Group Delay (Y, C, CV) 100kHz NTC-7 weighting 4.2 MHz lowpass NTC-7 weighting 4.2 MHz lowpass NTC-7 weighting 4.2 MHz lowpass to 3.58MHz (NTSC) at 1MHz f = 3.58MHz (referenced to 3MHz) Modulator Channel Modulator Channel Modulator Channel at 2.0MHz at 3.75MHz From 4.37MHz to 4.63MHz VCC=4.5V to 5.5V at 3.8MHz VCC=5V 3.8MHz -0.5 14 0.12 -0.04 -130 CONDITIONS MIN TYP 70 -75 -69 -60 9 0 -170 1.5 1.0 0.5 0.75 +0.75 -230 MAX UNITS ns dB dB dB ns ns ns % dB dB dB dB/V dB/C
Note 1: Note 2:
Sustained short circuit protection limited to 10 seconds Referenced to 300KHz
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Datasheet
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ML6415
PHYSICAL DIMENSIONS
Package S0 -Pin SOIC
0.1 9 - 0.199 (4. 0 - 5.06)
PIN 1 ID
0.14 - 0.15 (3.76 - 4.01)
0.22 - 0.244 (5.79 - 6.20)
1 0.017 - 0.027 (0.43 - 0.69) (4 PLACES) 0.050 BSC (1.27 BSC) 0.059 - 0.069 (1.49 - 1.75) 0 -
0.055 - 0.061 (1.40 - 1.55)
0.012 - 0.020 (0.30 - 0.51) SEATING PLANE
0.004 - 0.010 (0.10 - 0.26)
0.015 - 0.035 (0.3 - 0. 9)
0.006 - 0.010 (0.15 - 0.26)
ORDERING INFORMATION
PART NUMBER ML6415CS TEMPERATURE RANGE 0 to 70 PACKAGE 8 Pin SOIC (S08)
Micro Linear Corporation 2092 Concourse Drive San Jose, CA 95131 Tel: (408) 433-5200 Fax: (408) 432-0295 www.microlinear.com
DS6415-01
June, 2000
Datasheet
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